
Xilinx Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 238 interview experiences · FREE TO READ
Which role are you interviewing for?
30 roles · 238 reportsCandidate interview experiences
First-hand accounts from people who interviewed at Xilinx.
Test Engineer
Had an initial HR Screening over the phone. Then a three hour interview on site with multiple teams including engineering, management, and HR. Heard back within a few days. All very positive and friendly. Seemed like a nice culture.
- Could you test and break a given piece of software?
FPGA Verification Engineer
They first went over the job responsibilities and asked some straightforward questions about my resume. Then, the discussion moved to more in-depth FPGA IP verification topics, covering things like XDC, Verilog, and timing constraints, which are usually covered in master's level electrical engineering or digital design courses.
- Can you explain the set_multicycle_path constraint?
- How do you modify the start clock when using set_multicycle_path?
- How do you modify the end clock when using set_multicycle_path?
Designer
The normal process, we first talked about my professional background and then more technical topics were discussed, like the projects I worked on, the tools I used, project standards I followed, how I verified the design, and more technical details regarding FPGAs.
- Can you tell me about your experience level?
Material Planner
The interview process was really fast and went smoothly. It felt more like a chat where we both got to ask questions rather than a formal interview. I actually enjoyed it. The first interview was online and the second one was in person at the office, which was easy to get to.
- Could you introduce yourself?
- What led you to pursue this role over a path related to your major?
- What sparked your passion for this field?
Xilinx Interview Questions
Quoted word for word from Xilinx interview reports.
“How do you determine the sizing of pMOS and nMOS transistors in an inverter circuit?”
Read reports →“constructor / destructor - if we don't provide them, the compiler provides them. why can't we rely on that?”
Read reports →“Can you write a C++ function employing recursion to reverse a given number?”
Read reports →“What is the required number of bits to design a system with 'x' number of states?”
Read reports →“Is there any situation where the arbiter could cause starvation or live lock?”
Read report →“Design a synchronous FIFO with a depth of 4 and width of 32.”
Read report →“Can you tell me how to reverse the bits of a 32-bit integer?”
Read report →“What's the setup time like from a FF in a fast clock to the next FF in a sync fast clock/2?”
Read report →“Can you explain the difference between 60nm and 28nm technology nodes?”
Read report →Formats, difficulty and experience
Across all 238 Xilinx interview reports.