Xilinx Hardware Test / Validation Engineer Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 19 interview experiences · FREE TO READ
Candidate interview experiences
First-hand accounts from people who interviewed at Xilinx.
Xilinx
Verification Engineer
Staff Difficult Positive experience No offer 8 rounds
Interview process
Recruiter call Technical screen Presentation Onsite
Interview formats
Technical Coding Presentation
I sent in my application through the company's website. A team member reached out to me first. We had an hour-long phone call where they asked me about my technical knowledge, diving deeper into each topic. After that, I went in for a long interview session. It involved meeting seven different team members for 45 minutes each, plus a 30-minute presentation about embedded systems performance testing. As a recent graduate, I was a bit nervous, but everyone was really nice and understood my limited experience, adjusting their questions. I felt it went pretty well and got some nice comments about my attitude and schoolwork, but they needed someone with more experience, which I didn't have. I thought I did great, but didn't hear back, aside from a brief HR response saying they were still interviewing others.
Confirmed questions5 questions
- Can you describe how you'd test for worst-case execution time?
- Could you do some programming exercises in Assembly and C?
- What are your thoughts on flip flops, chaining time, response time, and setup/hold time?
Xilinx
Verification Engineer
Mid Easy Negative experience No offer 3 rounds
Interview process
Recruiter call Phone screen Technical screen Onsite
Interview formats
Coding Technical Behavioral
I interviewed with the PCIe team. First, a female engineer from Colorado asked me a nested loop question. She interrupted me at least 8 times, and after the 5th interruption, I stopped trying to solve it and tried not to cause a scene. She kept interrupting me and asked condescending questions sarcastically. This was the most disrespectful interviewer I've encountered. Later, I spoke with an engineer from Xilinx (Malaysia) who confirmed my assessment of her. Another engineer was insulting, asking simple questions and then a trick question which I only realized after the interview. He insisted on taking a picture of my solution, likely to report I missed the async trick question. They seemed like arrogant engineers. I'm glad I'm not working for them. The role was for a SystemVerilog OVM verification engineer for PCIe gen 3, but none of the questions were about SystemVerilog, OVM, or PCIe.
Confirmed questions2 questions
- What would you do if someone inserted a battery into a device incorrectly?
- Implement a substring search using nested loops.
Xilinx
Verification Design Engineer
Entry Average Negative experience Decline offer 3 rounds
Interview process
Recruiter call Onsite Offer
Interview formats
Behavioral Technical Coding
I applied online and had a phone interview, followed by an onsite. They mentioned they move quickly and I should hear back soon. I figured I didn't do well since I didn't get an email for a week, so I assumed I was out. Then, three weeks later, out of the blue, they called with an offer. They were cagey about details, wanting to know if I'd accept immediately, which felt unprofessional and pushy. When I couldn't commit right away, they got impatient and didn't want to give me much time to consider. I ultimately declined their offer.
Confirmed questions6 questions
- Can you introduce yourself and walk me through your resume and background?
- What are your thoughts on Object-Oriented Programming concepts?
- Can you solve these digital design and logic puzzles?
Xilinx Hardware Test / Validation Engineer Interview Questions
Quoted word for word from Xilinx interview reports.
“How can we minimize delay in a CMOS inverter?”
Read reports →“What is the structure of an FPGA?”
Read reports →“Can you use DeMorgan's Theorems to design a circuit using only NAND gates, based on a given Boolean Equation?”
Read reports →“What are the main parts of a smartphone's embedded system?”
Read reports →“Can you explain the difference between the 'new' and 'create' methods in UVM?”
Read report →“Can you explain the purpose of logic gates and then draw the specific logic gates needed to create a Boolean logic circuit using only a single type of logic gate?”
Read report →“From a system perspective (like memory), how is a software update performed?”
Read report →“What would you do if someone inserted a battery into a device incorrectly?”
Read report →“Could you explain how to design a priority encoder?”
Read report →Formats, difficulty and experience
Across all 19 Xilinx interview reports.