NXP Semiconductors Silicon / Chip Design Engineer Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 25 interview experiences · FREE TO READ
Candidate interview experiences
First-hand accounts from people who interviewed at NXP Semiconductors.
NXP Semiconductors
Senior DFT Engineer
Senior Average Positive experience Decline offer 4 rounds
Interview process
Recruiter call Phone screen Technical screen Onsite Background check
Interview formats
Behavioral Technical
Had an initial phone chat with talent acquisition, then a first interview with the DFT team manager. After that, a second, and sometimes a third interview with the N+1 and N+2 managers. Finally, one last interview with the HR team.
Confirmed questions1 question
- Can you explain the difference between chain patterns that fail with EDT and those that pass by bypassing EDT?
NXP Semiconductors
Physical Design Engineer
Mid Average Neutral experience Decline offer 1 round
Interview process
Technical screen
Interview formats
Technical Behavioral
They mostly asked about my past projects, asking me to walk through the design flow specific to those projects. Then, they asked 'what-if' questions related to those projects. After that, they had me explain the routing process in detail.
Confirmed questions4 questions
- Could you detail the types of timing violations encountered and their resolutions?
- Walk me through your past projects and the design flow involved.
- How did you handle 'what-if' situations in your projects?
NXP Semiconductors
DFT Engineer
Intern Average Positive experience Accept offer 1 round
Interview process
Technical screen
Interview formats
Technical
It was a quick and straightforward interview. They asked questions related to Digital Electronics, STA, and Verilog. We also discussed my past project from STMicroelectronics. Most questions involved some basic follow-up questions. The interviewer seemed really focused on understanding my knowledge level.
Confirmed questions2 questions
- Can you explain Setup and Hold Timing Analysis and the working regions of a CMOS Invertor?
- Tell me about your previous project at STMicroelectronics.
NXP Semiconductors Silicon / Chip Design Engineer Interview Questions
Quoted word for word from NXP Semiconductors interview reports.
“Can you create a NOT gate using only NAND gates?”
Read reports →“Can you provide the Verilog code for the mod2 counter?”
Read reports →“What is the significance of the two terminals in the opamp circuit?”
Read reports →“Could you write the RTL for a 3-clock divider?”
Read reports →“Can you explain fault detection and test vector inputs?”
Read report →“Can you draw the circuit diagram for the opamp you designed?”
Read report →“Could you write the RTL for a traffic light?”
Read report →“Can you explain Setup and Hold Timing Analysis and the working regions of a CMOS Invertor?”
Read report →“Could you explain the primary process involved in DFT?”
Read report →Formats, difficulty and experience
Across all 25 NXP Semiconductors interview reports.