
Dolphin Technology Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 21 interview experiences · FREE TO READ
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4 roles · 21 reportsCandidate interview experiences
First-hand accounts from people who interviewed at Dolphin Technology.
Design Verification Engineer
So, first there was an HR chat to screen things, then two tech interviews. The first tech one was all about SystemVerilog, UVM, and figuring out RTL bugs. The second tech one was more hands-on, looking at a testbench and writing some simple assertions. Lastly, I had a chat with the hiring manager about behavioral stuff.
- Could you explain the difference between blocking and non-blocking assignments in SystemVerilog?
- Tell me about how you would approach verifying a FIFO design.
- What's a virtual interface in UVM and what's its purpose?
Digital Circuit Design Engineer
I applied online and got an email for an onsite interview a few days later. They skipped the phone screen, which I thought was good, but they hadn't even looked at my resume. I don't live in San Jose, and they said they wouldn't cover travel costs. I hesitated to spend money on flights and hotels but thought it might be worth it. The interview was on a Friday afternoon. There was no set plan for who would interview me. HR just picked two junior engineers on the spot who clearly weren't prepared and hadn't seen my resume. Then a senior engineer came, looked at my resume, and said I wasn't a good fit because they wanted someone with more transistor-level design experience and less RTL design experience. I appreciated his honesty but was annoyed they didn't check my resume first, making me waste time and money. He gave me some good career advice, but I was still upset about the useless interview. So, if you get a direct onsite, don't get too excited, and if you're not local, think hard before spending money to travel.
- Can you explain the operation of a MOSFET?
- How does an inverter operate?
- What is transistor-level gate design?
Circuit Design Engineer
I got a call from the company after submitting my resume and they scheduled the on-site interview right away. Several people from different teams interviewed me. The first person asked me about inverters and NAND gates, specifically how to size them for equal rise and fall times, and then asked some verilog questions. The second person showed me diagrams of four circuits and asked about the output when the clock signal arrives, and also asked about passgate flip-flops. The third interviewer focused on C programming and gave me a written test.
- What is the inverter size?
- How is a NAND gate transformed into an inverter?
- Explain the function of the verilog code you wrote for a D-flipflop.
High Speed I/O Engineer
I applied online. Got an email to schedule a phone interview pretty quickly. Had one phone interview about my resume, it was about 20 mins. A week later, I went for the in-person interview. It had four rounds. Two rounds focused on digital logic questions like inverters, flip-flops (pros and cons), setup time, hold time, and latch-up. One round was focused on C programming. The last round involved analog questions such as CS, Ids, and current mirrors.
- Can you explain the pros and cons of the FF you sketched and how it compares to other schematics?
Dolphin Technology Interview Questions
Quoted word for word from Dolphin Technology interview reports.
“Why does pinch-off happen in saturation mode for a CMOS device?”
Read reports →“What occurs with an inverter that has a series NMOS connected to it?”
Read reports →“How is a NAND gate transformed into an inverter?”
Read reports →“Given an input to an inverter of 0.5 VDD, what is the output value?”
Read reports →“Between NMOS logic on NAND, NOR, and inverter, which one is quicker, and which one uses the most power?”
Read report →“What is the formula for power consumption, covering dynamic, switching, and leakage power?”
Read report →“Explain why PMOS is typically sized up compared to NMOS in an inverter.”
Read report →“Regarding charge sharing, what happens after the switch is closed when two capacitors are connected in parallel with the switch open?”
Read report →“What are latch setup and hold times, and why don't latches have setup and hold requirements at the positive edge?”
Read report →Formats, difficulty and experience
Across all 21 Dolphin Technology interview reports.