
Cirrus Logic General Intern Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 13 interview experiences · FREE TO READ
Candidate interview experiences
First-hand accounts from people who interviewed at Cirrus Logic.
Intern
It was a two-stage interview process. The first round was with HR. The second round involved two engineers who skipped introductions and directly asked about my project for about 30 minutes, without inquiring about my past experience.
- Can you discuss your project?
- What is the impact on the output with resistor variance?
- What is the impact on the output with VDD variance?
Intern
I applied on the company's website and then got contacted by HR. They told me the position was actually different from the one I applied for. The first interview was with the hiring manager, and we talked about my resume. The second interview was with someone who would be my mentor, and they also went over my resume but asked more technical questions. In the end, I wasn't offered the original role but was given a different position.
- Tell me about OOP concepts based on your resume.
Intern
The interview was a nice and casual experience. It included a mix of prepared technical questions and questions about my resume. The hiring manager seemed enthusiastic about me and indicated I would move forward. However, I never heard back after following up via email, which is a bummer because the engineers there seem really competent and cool.
- Can you describe the time-domain response of a basic RC circuit filter?
- How would you implement a flip-flop using Verilog?
Cirrus Logic General Intern Interview Questions
Quoted word for word from Cirrus Logic interview reports.
“What's the difference between a Low pass filter and a High pass filter?”
Read reports →“Can you design a Nand Gate using CMOS?”
Read reports →“What is the effect of changing vgs?”
Read reports →“Describe the frequency response of a unit step function.”
Read reports →“How would you design a NOR gate using PMOS and NMOS transistors?”
Read report →“What is the impact on the output with resistor variance?”
Read report →“What is the impact on the output with VDD variance?”
Read report →“What is sampling and aliasing?”
Read report →“Can you draw the CMOS circuit for a NAND gate and explain how it works?”
Read report →Formats, difficulty and experience
Across all 13 Cirrus Logic interview reports.