Optiver Silicon / Chip Design Engineer Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 32 interview experiences · FREE TO READ
Candidate interview experiences
First-hand accounts from people who interviewed at Optiver.
Optiver
FPGA Engineer
Mid Average Negative experience No offer 2 rounds
Interview process
Take home Technical screen
Interview formats
Technical Coding
I had a take-home exam, and then we reviewed the questions from it. The interviewer had technical issues and was quite unprofessional. Make sure you study up on FPGA properties and techniques for reducing latency. They really dig into details about optimizing designs for low latency.
Confirmed questions1 question
- Can you list some methods for reducing latency?
Optiver
FPGA Engineer
Intern Easy Neutral experience No offer 1 round
Interview process
Technical screen
Interview formats
Technical Coding
It was an online assessment. Started with logic gates and truth table questions, followed by a systemverilog debugging question. Then there were coding questions related to networking, data structures, and basic coding principles.
Confirmed questions1 question
- How would you debug RTL code written in SystemVerilog?
Optiver
FPGA Engineer
Entry Average Positive experience No offer 2 rounds
Interview process
Take home Recruiter call
Interview formats
Technical Behavioral
First, there was an online hackerrank assessment which was pretty straightforward, especially if you've taken university courses in digital system design. After passing that, I had an HR interview. It was a casual chat for about 15-20 minutes where they asked how I learned about the Optiver job, some general behavioral questions, and specifically about my FPGA background. I only had university-level FPGA experience, which I think might have impacted my chances. The whole process was quick and easy, but I was a bit disappointed not to get any feedback.
Confirmed questions3 questions
- Could you describe any FPGA experience you have gained outside of your university studies?
- What prompted your interest in the Optiver role?
- Can you elaborate on your FPGA experience?
Optiver Silicon / Chip Design Engineer Interview Questions
Quoted word for word from Optiver interview reports.
“What's the time complexity for removing an item from a doubly linked list?”
Read reports →“Can you determine the output of the given digital circuit?”
Read reports →“Can you draw the time state diagram for a given logic circuit?”
Read reports →“How would you debug RTL code written in SystemVerilog?”
Read reports →“Can you explain the difference between grey encoding, standard encoding, and one hot encoding?”
Read report →“Can you explain how a multiplexer is constructed using a Look-Up Table (LUT)?”
Read report →“Can you tell me about the fundamentals of VHDL?”
Read report →“Can you list some methods for reducing latency?”
Read report →“What about questions on boolean algebra and minimization?”
Read report →Formats, difficulty and experience
Across all 32 Optiver interview reports.