onsemi Silicon / Chip Design Engineer Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 12 interview experiences · FREE TO READ
Candidate interview experiences
First-hand accounts from people who interviewed at onsemi.
onsemi
Physical Design Engineer
Entry Average Positive experience Accept offer 2 rounds
Interview process
Technical screen Background check Offer
Interview formats
Technical Behavioral
I interviewed for on-semi campus placements. It started with an online test covering digital and analog topics. Then, there were two rounds: a technical interview and an HR interview. The interview was straightforward. They didn't ask about my resume or projects. Instead, they asked which role I was interested in among Physical Design, RTL Design, and Verification, and I chose Physical Design.
Confirmed questions6 questions
- Can you explain the Physical Design flow?
- What is DFT?
- What are the various DFT Techniques?
onsemi
Post Silicon Validation Engineer
Intern Difficult Positive experience No offer 3 rounds
Interview process
Recruiter call Technical screen Onsite Background check
Interview formats
Technical Technical Behavioral
I had emailed my resume to the recruiter about a month ago. Last week, I received an email regarding the internship program. The recruiter inquired about my interest, and upon my confirmation, sent me the call letter. The process involved a written technical test, followed by a face-to-face technical interview, and concluded with an HR round. The entire process took place in a single day and the atmosphere was quite friendly.
Confirmed questions2 questions
- Could you answer questions covering CMOS, digital electronics, microprocessors, and transient analysis?
- Were there any logical reasoning questions at the end?
onsemi
ASIC Engineer
Entry Average Neutral experience No offer 1 round
Interview process
Technical screen
Interview formats
Technical Coding
The first round involved a Q&A session and several written tests covering topics like state machines, latches, digital design principles, LUTs, and software tools. The Q&A focused on my knowledge and skills, and the interviewer reviewed my CV and took notes.
Confirmed questions2 questions
- Tell me about your familiarity with different tools.
- Are you familiar with verification methodologies such as UVM?
onsemi Silicon / Chip Design Engineer Interview Questions
Quoted word for word from onsemi interview reports.
“What is quantization noise?”
Read reports →“Regarding design for testability (DFT), how can power consumption in an electric-based digital circuit be lowered?”
Read reports →“Could you explain how setup time violation and hold time violation are related to the frequency?”
Read reports →“What is DFT?”
Read reports →“What is miller compensation?”
Read report →“Could you explain what hold time violation is and how it relates to frequency?”
Read report →“Can you explain Temperature Inversion?”
Read report →“What are the various DFT Techniques?”
Read report →“Regarding design for testability (DFT), what methods can be used to reduce hazards in an electric-based digital circuit?”
Read report →Formats, difficulty and experience
Across all 12 onsemi interview reports.