
LSI Hardware Test / Validation Engineer Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 7 interview experiences · FREE TO READ
Candidate interview experiences
First-hand accounts from people who interviewed at LSI.
Verification Engineer
The hiring process was quite bad. They didn't even look at my resume before calling me for an interview.
- Lots of questions that didn't seem to matter.
Verification Engineer
Had an in-person meeting with a manager and two senior engineers where we discussed my previous work and some modeling/verification approaches.
- Could you describe your experience using SystemVerilog?
Design and Verification Engineer
They asked me about my resume first. I had to explain the I2c bus protocol because I had a project using it. Then they asked me how to sync between 2 clock domains. I said asynchronous FIFO, but they wanted 'synchronizer'. They then asked me about the circuit of a synchronizer. Next, they asked how to sync 2 systems running at different frequencies if one sends data too fast. I said 'delay elements', and they talked about asynchronous feedback logic. Finally, they asked what happens on the I2c bus if a design fault causes 2 peripherals to send data at the same time.
- Regarding asynchronous feedback logic.
- I don't know about asynchronous circuits.
LSI Hardware Test / Validation Engineer Interview Questions
Quoted word for word from LSI interview reports.
“What is a sequence detector?”
Read reports →“Could you define setup time?”
Read reports →“Can you explain Setup and Hold time analysis?”
Read reports →“Can you explain the main flow of a server-side program in a client-server architecture?”
Read reports →“Do you have any Verilog questions?”
Read report →“Tell me about counter design.”
Read report →“Could you describe your experience using SystemVerilog?”
Read report →Formats, difficulty and experience
Across all 7 LSI interview reports.