Intel Corporation Silicon / Chip Design Engineer Interview
Questions & Process
What 257 candidates said about the rounds, the
questions and how long the wait really is.
From 257 candidate reports · FREE TO READ
Questions candidates reported
Quoted word for word from Intel Corporation interview reports.
Engineering accounts for 10,860 of 257 reports, so company-wide questions may lean toward that function. Pick your role above for questions from your own loop.
“what is difference between latch and flip flop”
Read reports →“What is setup and hold time”
Read reports →“What is a Verilog environment?”
Read reports →“Why does it have to be 5 stages?”
Read reports →“What is the role of the Physical Design (PD) flow in the overall ASIC flow?”
Read report →“How to fix setup and hold time?”
Read report →“Explain STA.”
Read report →“What do you know about physical design in VLSI?”
Read report →“Tell me about your project.”
Read report →Formats, difficulty and experience
Across all 257 Intel Corporation interview reports.
Question formats
Interview difficulty
Candidate experience
Reports by job function
The interview process
Described in candidates’ own words.
“It was 3 interviews, 30 minutes each. The interviews were software focused even though it was a hardware role. The first hour was software and the last 30 mins was Verilog. The software questions weren't that hard but they did catch me off guard since I was expecting hardware questions.”Candidate-reported process
“The interviews were both done online. They included one software leetcode style interview and one hardware Verilog interview. There were no conceptual or behavioral questions. It was just one round, not multiple rounds.”Candidate-reported process
“It was a phone interview with the hiring manager, then there were 6 rounds of panel interviews. After that, the recruiter contacted me.”Candidate-reported processMore reports lockedRead 300+ more interview experiences
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