IMC Trading Silicon / Chip Design Engineer Interview Questions
& Process
Real candidates share what happened, how many rounds they had,
and how the experience turned out.
Based on 8 interview experiences · FREE TO READ
Candidate interview experiences
First-hand accounts from people who interviewed at IMC Trading.
IMC Trading
FPGA Engineer
Mid Difficult Neutral experience No offer 1 round
Interview process
Take home
Interview formats
Coding
Took an online SystemVerilog coding assessment. It was a 2-hour assessment with one problem. It was pretty complex, and the testbench/waveform were difficult to read/understand. The assessment was to implement a full trading related state machine and datapath control to detect specific patterns.
Confirmed questions1 question
- Write and validate a SystemVerilog module that implements a trading-related datapath and control flow.
IMC Trading
FPGA Engineer
Intern Average Positive experience No offer 2 rounds
Interview process
Recruiter call Take home
Interview formats
Technical
Recruiters were responsive and got back to me quickly after my OA. However, it took about two months from resume drop to receive the OA. The actual interview is coming up soon.
Confirmed questions1 question
- FPGA Online Assessment: Verilog assignment
IMC Trading
FPGA Design Engineer
Senior Average Negative experience No offer 3 rounds
Interview process
Recruiter call Technical screen Take home
Interview formats
Technical Coding
First, there was a recruiter call, which was pretty standard. Then, a technical screen to check if I had the right background. After that, a homework assignment was given: build a packet parser in SV, Verilog, or VHDL. If you really put effort into it, it's a lot of work, especially if you're already working a day job! It felt like a cheap way to get packet parsing ideas from candidates. I submitted the homework and didn't move forward.
Confirmed questions1 question
- Implement a packet parser using SystemVerilog, Verilog, or VHDL.
IMC Trading Silicon / Chip Design Engineer Interview Questions
Quoted word for word from IMC Trading interview reports.
“Implement a packet parser using SystemVerilog, Verilog, or VHDL.”
Read reports →“Predict the output of a circuit based on its design.”
Read reports →“Write and validate a SystemVerilog module that implements a trading-related datapath and control flow.”
Read reports →“Analyze the possible behaviors starting from a time graph.”
Read reports →“The interview focused on HDL coding and how it mapped to FPGA technology.”
Read report →“Could you please introduce yourself?”
Read report →“Describe a challenge you encountered during a project.”
Read report →Formats, difficulty and experience
Across all 8 IMC Trading interview reports.